Disclosed is an SOI active interposer for three-dimensional packaging and a fabrication method thereof. An SOI substrate is used as the substrate, and a CMOS inverter is formed on the top silicon of the SOI by using standard integrated circuit manufacturing processes, so that short channel effect and latch-up effect can be suppressed. A via hole structure is etched on the SOI substrate between the PMOS and NMOS transistors of the CMOS inverter, which on the one hand can be used as a conductive channel between the chips in a vertical direction, and on the other hand, can be used as an electrical isolation layer between the PMOS and NMOS transistors.