- 专利标题: PROCESSOR COMPILER FOR SCHEDULING INSTRUCTIONS TO REDUCE EXECUTION DELAY DUE TO DEPENDENCIES
-
申请号: US18083388申请日: 2022-12-16
-
公开(公告)号: US20230121986A1公开(公告)日: 2023-04-20
- 发明人: Jonathan Alexander Ross , Gregory M. Thorson
- 申请人: Groq, Inc.
- 申请人地址: US CA Mountain View
- 专利权人: Groq, Inc.
- 当前专利权人: Groq, Inc.
- 当前专利权人地址: US CA Mountain View
- 主分类号: G06N5/022
- IPC分类号: G06N5/022 ; G06N20/00
摘要:
A system receives a predictive model and receives one or more runtime constraints. The system generates a directed acyclic graph (DAG) of the predictive model indicating dependencies. The system compiles the predictive model into first instructions for a first processor based on the one or more runtime constraints and the DAG. The system packages first instructions, the one or more runtime constraints, and the DAG of the predictive model in a first binary. The system recompiles the predictive model into second instructions for a second processor based on the runtime constraints and the DAG stored in the first processor. The system packages the second instructions, the DAG, and the runtime constraints in a second binary.
公开/授权文献
信息查询