A secure element (SE) coupled to a system-on-chip (SoC) includes an internal memory, virtual secure direct memory access (DMA) circuitry configured to perform a secure operation using an external memory connected to the SoC in association with the internal memory, and SE interface circuitry configured to output secure data and a write request generated by the virtual secure DMA circuitry to the SoC, the secure data being stored in the external memory.