Invention Publication
- Patent Title: Method for Forming a Buried Metal Line in a Semiconductor Substrate
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Application No.: US18469374Application Date: 2023-09-18
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Publication No.: US20240006228A1Publication Date: 2024-01-04
- Inventor: Boon Teik Chan , Zheng Tao , Efrain Altamirano Sanchez , Anshul Gupta , Basoene Briggs
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Priority: EP 187988.1 2019.07.24
- The original application number of the division: US16934200 2020.07.21
- Main IPC: H01L21/74
- IPC: H01L21/74 ; H01L21/8234 ; H01L23/535 ; H01L23/528

Abstract:
A method for forming a buried metal line in a semiconductor substrate comprises forming, at a position between a pair of semiconductor structures, a metal line trench in the semiconductor substrate at a level below a base of each semiconductor structure of the pair, and forming the metal line in the metal line trench by means of area selective deposition of a metal line material, followed by embedding the pair of semiconductor structures in an insulating layer.
Public/Granted literature
- US12237207B2 Method for forming a buried metal line in a semiconductor substrate Public/Granted day:2025-02-25
Information query
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