Invention Publication
- Patent Title: Bonding Structure with Stress Buffer Zone and Method of Forming Same
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Application No.: US18159938Application Date: 2023-01-26
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Publication No.: US20240006352A1Publication Date: 2024-01-04
- Inventor: SyuFong LI , Yu-Ping TSENG , Li-Hsien HUANG , Yao-Chun Chuang , Yinlung LU
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A method includes depositing a first dielectric layer on a first substrate of a first device die, etching the first dielectric layer to form a trench, depositing a metallic material in the trench and on a top surface of the first dielectric layer, and performing a chemical mechanical polish (CMP) process to remove a portion of the metallic material from the top surface of the first dielectric layer to form a first metal pad. After the performing of the CMP process, the method selectively etches the first metal pad to form recesses at an edge portion of the first metal pad, deposits a second dielectric layer on a second substrate of a second device die, forms a second metal pad in the second dielectric layer, and bonds the second device die to the first device die.
Information query
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