- 专利标题: SEMICONDUCTOR DIE ASSEMBLY HAVING A POLYGONAL LINKING DIE
-
申请号: US17810606申请日: 2022-07-03
-
公开(公告)号: US20240006374A1公开(公告)日: 2024-01-04
- 发明人: Jen-Yuan Chang
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsinchu
- 主分类号: H01L25/065
- IPC分类号: H01L25/065 ; H01L23/00 ; H01L23/538 ; H01L25/00
摘要:
A semiconductor die assembly is provided. The semiconductor die assembly includes: a first bottom die and a second bottom die disposed at a bottom vertical level; a first top die disposed at a top vertical level above the bottom vertical level in a vertical direction and bonded to the first bottom die; a second top die disposed at the top vertical level and bonded to the second bottom die; and a linking die disposed at the top vertical level and bonded to both the first bottom die and the second bottom die. The linking die is characterized by a polygonal shape in a horizontal plane perpendicular to the vertical direction, and the polygonal shape is not a rectangle.
信息查询
IPC分类: