Invention Publication
- Patent Title: LINK COORDINATION IN MULTI-LINK DEVICES
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Application No.: US18066870Application Date: 2022-12-15
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Publication No.: US20240015642A1Publication Date: 2024-01-11
- Inventor: Pooya MONAJEMI , Brian D. HART , Vishal S. DESAI , Peiman AMINI , Ardalan ALIZADEH
- Applicant: Cisco Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: H04W48/18
- IPC: H04W48/18 ; H04W24/04 ; H04W76/38

Abstract:
A system includes a memory and a processor communicatively coupled to the memory. The processor, in response to determining that a first number of transmissions over a first link with a first frequency has failed, selects a second link with a second frequency for transmission. The second frequency is lower than the first frequency. The processor also, in response to determining that a second number of transmissions over the second link has failed, one or more of (i) stop the transmissions over the second link or (ii) begins transmissions over a third link with a third frequency. The second number is greater than the first number.
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