Invention Publication
- Patent Title: METHOD AND CIRCUIT FOR ADAPTIVE COLUMN-SELECT LINE SIGNAL GENERATION
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Application No.: US17875449Application Date: 2022-07-28
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Publication No.: US20240038293A1Publication Date: 2024-02-01
- Inventor: PO-HSUN WU , JEN-SHOU HSU
- Applicant: ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.
- Applicant Address: TW Hsinchu
- Assignee: ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.
- Current Assignee: ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.
- Current Assignee Address: TW Hsinchu
- Main IPC: G11C11/408
- IPC: G11C11/408

Abstract:
Method and circuit for adaptive column-select line signal generation for a memory device are provided. The method comprises the following steps. A first signal is generated in response to a memory access command. A second signal is generated according to a candidate signal selected from a plurality of candidate signals including a first candidate signal and a second candidate signal, wherein after the first signal is asserted, the first candidate signal is asserted when a configurable time interval with respect to a parameter from a register set elapses and the second candidate signal is asserted when a specified time interval elapses, and the selected candidate signal is asserted before a remaining part of the candidate signals after the first signal is asserted. A column-select line signal is generated according to the first signal and the second signal.
Public/Granted literature
- US11955163B2 Method and circuit for adaptive column-select line signal generation Public/Granted day:2024-04-09
Information query
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