发明公开
- 专利标题: ADAPTIVE INTEGRITY SCAN RATES IN A MEMORY SUB-SYSTEM BASED ON BLOCK HEALTH METRICS
-
申请号: US17891859申请日: 2022-08-19
-
公开(公告)号: US20240062835A1公开(公告)日: 2024-02-22
- 发明人: Vamsi Pavan Rayaprolu , Christopher M. Smitchger , James Fitzpatrick , Patrick R. Khayat , Sampath K. Ratnam
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 主分类号: G11C16/34
- IPC分类号: G11C16/34 ; G11C16/26
摘要:
A processing device in a memory sub-system detects an occurrence of a data integrity check trigger event and, responsive to the occurrence of the data integrity check trigger event, identifies a memory die of a plurality of memory dies. The processing device further associates each segment of the identified memory die with a respective group of a plurality of groups, each group representing one or more of a plurality of error mechanisms, and determines one or more respective adaptive scan frequencies for the identified memory die based on statistics of the segments associated with each respective group.
信息查询