Invention Publication
- Patent Title: TWO-TIER DEFECT SCAN MANAGEMENT
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Application No.: US17894794Application Date: 2022-08-24
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Publication No.: US20240069765A1Publication Date: 2024-02-29
- Inventor: Kishore Kumar Muchherla , Robert Loren O. Ursua , Sead Zildzic , Eric N. Lee , Jonathan S. Parry , Lakshmi Kalpana K. Vakati , Jeffrey S. McNeil
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A system can include a processing device operatively coupled with the one or more memory devices, to perform operations that include writing data to the one or more memory devices and performing one or more scan operations on a management unit containing the data to determine a current value of a chosen data state metric. Each scan operation can be performed using a corresponding predetermined read-time parameter value. The operations can include determining whether the current value of the chosen data state metric satisfies a criterion, and can also include, responsive to determining that the current value of the chosen data state metric satisfies the criterion, selecting a remedial operation by determining whether redundancy metadata is included in a fault tolerant data stripe on the one or more memory devices. The operations can also include performing the remedial operation with respect to the management unit.
Public/Granted literature
- US12105967B2 Two-tier defect scan management Public/Granted day:2024-10-01
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