Invention Publication
- Patent Title: TECHNIQUES TO MODIFY PROCESSOR PERFORMANCE
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Application No.: US17848274Application Date: 2022-06-23
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Publication No.: US20240094793A1Publication Date: 2024-03-21
- Inventor: Benjamin D. Faulkner , Padmanabhan Kannan , Srinivasan Raghuraman , Peng Cheng Shen , Divya Ramakrishnan , Swanand Santosh Bindoo , Sreedhar Narayanaswamy , Amey Y. Marathe
- Applicant: NVIDIA Corporation
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F1/30
- IPC: G06F1/30 ; G06F11/07
Abstract:
Apparatuses, systems, and techniques to optimize processor performance. In at least one embodiment, a method increases an operation voltage of one or more processors, based at least in part, on one or more error rates of the one or more processors.
Public/Granted literature
- US12124308B2 Techniques to modify processor performance Public/Granted day:2024-10-22
Information query
