Invention Publication
- Patent Title: MULTI-LAYERED CERAMIC CAPACITOR
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Application No.: US18519368Application Date: 2023-11-27
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Publication No.: US20240096559A1Publication Date: 2024-03-21
- Inventor: Hwi Dae KIM , Chan YOON , Ji Hong JO , Sang Soo PARK , Woo Chul SHIN
- Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Priority: KR 20190086398 2019.07.17
- Main IPC: H01G4/30
- IPC: H01G4/30 ; H01G2/02 ; H01G4/012 ; H01G4/12

Abstract:
A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes having different sizes to each other, and having first and second surfaces of the first and second internal electrodes, opposing each other in a stacking direction, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces and connected to the third and fourth surfaces, and opposing each other; and first and second external electrodes. When a margin of the first internal electrode in a longitudinal direction is b, and a margin of the first internal electrode in a width direction is d, a margin of the second internal electrode in a longitudinal direction is a, and a margin of the second internal electrode in a width direction is c, a ratio (a/b) of the margin (a) of the second internal electrode in the longitudinal direction to the margin (b) of the first internal electrode in the longitudinal direction is 0.33 or more (where, a>0 and b>0) or a ratio (c/d) of the margin (c) of the second internal electrode in the width direction to the margin (d) of the first internal electrode in the width direction is 0.33 or more (where, c>0 and d>0).
Information query