• Patent Title: METHOD AND APPARATUS FOR PERFORMING ACCESS MANAGEMENT OF MEMORY DEVICE IN HOST PERFORMANCE BOOSTER ARCHITECTURE WITH AID OF DEVICE SIDE TABLE INFORMATION ENCODING AND DECODING
  • Application No.: US17959320
    Application Date: 2022-10-04
  • Publication No.: US20240111670A1
    Publication Date: 2024-04-04
  • Inventor: Yu-Chih Lin
  • Applicant: Silicon Motion, Inc.
  • Applicant Address: TW Hsinchu County
  • Assignee: Silicon Motion, Inc.
  • Current Assignee: Silicon Motion, Inc.
  • Current Assignee Address: TW Hsinchu County
  • Main IPC: G06F12/02
  • IPC: G06F12/02
METHOD AND APPARATUS FOR PERFORMING ACCESS MANAGEMENT OF MEMORY DEVICE IN HOST PERFORMANCE BOOSTER ARCHITECTURE WITH AID OF DEVICE SIDE TABLE INFORMATION ENCODING AND DECODING
Abstract:
A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information encoding and decoding are provided. The method may include: encoding internal information of the memory device and sending encoded result thereof to a host device, to allow the host device to store the encoded result in a memory within the host device as host-owned encoded device side table information at the host device; generating and storing multiple entries of address mapping control table into a RAM as at least one portion of device side table information at the memory device; decoding partial information of the host-owned encoded device side table information, performing checking operation on decoded result thereof, and selectively using the decoded result to determine physical address associated with logical address; and reading data from the NV memory according to the physical address.
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