A semiconductor package includes a semiconductor chip including a semiconductor substrate having a first surface and a second surface opposite to the first surface, a chip pad located on the first surface and including a conductive layer, a support pad positioned on the first surface, spaced apart from the chip pad and including an insulating layer, a support bump connected to the support pad, a wiring substrate disposed to face the semiconductor substrate, a support bonding on trace (BOT) pad disposed on the wiring substrate and bonded to the support bump, and a dummy area disposed on the wiring substrate and spaced apart from the support BOT pad.