In described examples, an integrated circuit includes an output terminal coupled to an input of a power amplifier, a feedback terminal coupled to an output of the power amplifier, a data terminal that receives a data stream, and a digital pre-distortion (DPD) circuit. The DPD circuit includes a capture circuit, a DPD estimator responsive to the data stream and the feedback terminal, and a DPD corrector responsive to the DPD estimator. The DPD estimator includes an instruction memory configured to store instructions and a vector arithmetic processing unit (APU) coupled to the instruction memory. The vector APU includes vector memories, vector arithmetic blocks, and an instruction decode block. The vector arithmetic blocks include vector addition blocks and vector multiplication blocks. The instruction decode block is configured to cause the vector APU to perform complex domain vector arithmetic on vectors stored in the vector memories in response to the instructions.