Invention Publication
- Patent Title: CACHING TECHNIQUES USING A TWO-LEVEL READ CACHE
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Application No.: US18071798Application Date: 2022-11-30
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Publication No.: US20240176741A1Publication Date: 2024-05-30
- Inventor: Vladimir Shveidel , Vamsi K. Vankamamidi
- Applicant: Dell Products L.P.
- Applicant Address: US MA Hopkinton
- Assignee: Dell Products L.P.
- Current Assignee: Dell Products L.P.
- Current Assignee Address: US MA Hopkinton
- Main IPC: G06F12/0831
- IPC: G06F12/0831 ; G06F12/0882 ; G06F12/0891

Abstract:
Techniques for processing a read I/O operation that reads first content stored at a target logical address can include: determining, using the target logical address as a first key to index into a first cache, whether the first cache includes a first cache entry caching first metadata used to access a first physical storage location including the first content stored at the target logical address; responsive to determining the first cache includes the first cache entry, determining, using the first metadata as a second key to index into a second cache, whether the second cache includes a second cache entry caching the first content stored at the target logical address; and responsive to determining the second cache includes the second entry, returning the first content from the second entry of the second cache in response to the read I/O operation.
Public/Granted literature
- US12222862B2 Caching techniques using a two-level read cache Public/Granted day:2025-02-11
Information query
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