Invention Publication
- Patent Title: Method for Forming a Semiconductor Device
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Application No.: US18543933Application Date: 2023-12-18
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Publication No.: US20240204082A1Publication Date: 2024-06-20
- Inventor: Boon Teik Chan , Shairfe Muhammad Salahuddin , Julien Ryckaert , Bilal Chehab , Hsiao-Hsuan Liu
- Applicant: IMEC VZW , Katholieke Universiteit Leuven
- Applicant Address: BE Leuven
- Assignee: IMEC VZW,Katholieke Universiteit Leuven
- Current Assignee: IMEC VZW,Katholieke Universiteit Leuven
- Current Assignee Address: BE Leuven
- Priority: EP 214863.7 2022.12.20
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/306

Abstract:
Example embodiments relate to methods for forming a semiconductor device. One example method includes forming a device structure on a substrate, where the device structure includes a device layer stack that includes a bottom device sub-stack that includes at least one bottom channel layer and a top device sub-stack that includes at least one top channel layer, a sacrificial gate structure extending across the device layer stack, and bottom source/drain structures on opposite ends of at least one bottom channel layer. The method also includes forming an opening exposing the top device sub-stack, wherein forming the opening includes etching the sacrificial gate structure, forming a cut through the top device sub-stack by etching back the top device sub-stack from the opening and, subsequent to forming the cut, forming a functional gate stack on the at least one bottom channel layer.
Information query
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