A source driving circuit includes: a logic and control sub-circuit configured to convert a source data signal into a data signal; a latch sub-circuit configured to, receive the data signal, latch an odd-numbered row of data in an odd-numbered frame, and latch an even-numbered row of data in an even-numbered frame; and an output sub-circuit configured to: receive the odd-numbered row of data in the odd-numbered frame and output the odd-numbered row of data in a first set duration, which is greater than a charging time of sub-pixels in the even-numbered row and less than or equal to twice the charging time; and receive the even-numbered row of data in the even-numbered frame and output the even-numbered row of data in a second set duration, which is greater than a charging time of sub-pixels in the odd-numbered row and less than or equal to twice the charging time.