Invention Publication
- Patent Title: STACKED DIE MODULES FOR SEMICONDUCTOR DEVICE ASSEMBLIES AND METHODS OF MANUFACTURING STACKED DIE MODULES
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Application No.: US18614579Application Date: 2024-03-22
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Publication No.: US20240258243A1Publication Date: 2024-08-01
- Inventor: Jong Sik Paek
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L21/56 ; H01L21/768 ; H01L23/00 ; H01L23/31 ; H01L23/498 ; H01L25/10

Abstract:
Stacked die modules for semiconductor device assemblies and methods of manufacturing the modules are disclosed. In some embodiments, the module includes a shingled stack of semiconductor dies, each die having an uncovered porch with bond pads. Further, a dielectric structure partially encapsulates the shingled stack of semiconductor dies. The dielectric structure includes openings corresponding to the bond pads. The module also includes conductive structures disposed on the dielectric structure, where each of the conductive structures extends over at least one porch of the semiconductor dies to connect to at least one bond pad through a corresponding opening. The semiconductor device assembly may include a controller die attached to a package substrate, the controller die carrying one or more stacked die modules, and bonding wires connecting terminals of the modules to package bond pads.
Information query
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