An apparatus includes a first switch coupled between a first voltage source and input/output (I/O) circuitry of a memory device, wherein the first voltage source is to supply power to core memory circuitry of the memory device. A second switch is coupled between a second voltage source and the I/O circuitry. Control logic is coupled with the first and second switches and to cause the second switch to be activated to permit current to flow from the second voltage source to the I/O circuitry. The control logic, in response to detecting a current draw from the I/O circuitry that satisfies a first threshold criterion, causes the first switch to be activated.