A storage device includes a buffer chip and a memory device. The memory device transmits a random data signal and a data strobe signal to the buffer chip based on a clock signal received from the buffer chip. The buffer chip includes a delay circuit that delays the data strobe signal by a delay time to generate a delayed data strobe signal, a sampler that receives the delayed data strobe signal from the delay circuit and samples the random data signal based on the delayed data strobe signal to generate sampled data, a comparator that compares internal data with the sampled data to generate a comparison result, and a counter module that receives the comparison result from the comparator and determines a target delay based on the comparison result. The buffer chip delays the delayed data strobe signal based on the target delay.