A device comprises a vertical transistor and a shielding material comprising a conductive material having a P+ type conductivity. The vertical transistor includes an electrode, a dielectric material adjacent to the electrode, and a channel region adjacent to the dielectric material. The channel region comprises a composite structure including at least two semiconductor materials. Also disclosed is a device comprising a first electrically conductive line, vertical transistors overlying the first conductive line, a second electrically conductive line overlying the vertical transistors, and a shielding material positioned between the two adjacent vertical transistors. Each of the vertical transistors comprises a gate electrode, a gate dielectric material on opposite sides of the gate electrode, and a channel region comprising a composite structure including at least two oxide semiconductor materials. The gate dielectric material positions between the gate electrode and the channel region. The shielding material comprises an electrically conductive material.