A circuit includes primary register circuitry to receive a first signal to write a first value to the primary register circuitry; secondary register circuitry to receive a second signal to write a second value to the secondary register circuitry; a counter configured to count a set amount of time from when the first signal is received; and a controller coupled to the counter. The controller receives at least one of: a third signal indicating whether the second signal was detected within the set amount of time, and a fourth signal indicating whether the first value is the same as the second value.