HARDWARE ACCELERATOR OPTIMIZED GROUP CONVOLUTION BASED NEURAL NETWORK MODELS
Abstract:
Methods, systems, and apparatus, including computer-readable media, are described for processing an input image using integrated circuit that implements a convolutional neural network with a group convolution layer. The processing includes determining a mapping of partitions along a channel dimension of an input feature map to multiply accumulate cells (MACs) in a computational unit of the circuit and applying a group convolution to the input feature map. Applying the group convolution includes, for each partition: providing weights for the group convolution layer to a subset of MACs based on the mapping; providing, via an input bus of the circuit, an input of the feature map to each MAC in the subset; and computing, at each MAC in the subset, a product using the input and a weight for the group convolution layer. An output feature map is generated for the group convolution layer based on an accumulation of products.
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