MEMORY DEVICE WITH A MULTIPLEXER CIRCUIT AND MULTIPLE INPUT/OUTPUT INTERFACES
Abstract:
A memory device including a first plane group, a second plane group and a multiplexer circuit. The multiplexer circuit is coupled to a first input/output (I/O) interface and a second I/O interface. The multiplexer circuit enables the first I/O interface to access the first plane group and the second plane group and enables the second I/O interface to access the first plane group and the second plane group.
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