MULTI-GATE TRANSISTOR STRUCTURE WITH ETCH STOP LAYER
Abstract:
A device includes a gate structure, source/drain regions, a first source/drain contact, an etch stop layer, and a first source/drain via. The gate structure is over a substrate. The source/drain regions are at opposite sides of the gate structure. The first source/drain contact is over a first one of the source/drain regions. The etch stop layer overlaps the gate structure but does not overlap the first source/drain contact. The first source/drain via is over the first source/drain contact. The first source/drain via has a stepped bottom surface structure comprising a lower step in contact with a top surface of the first source/drain contact, an upper step in contact with a top surface of the etch stop layer, and a step rise connecting the lower step and the upper step. The step rise is in contact with a side surface of the etch stop layer.
Information query
Patent Agency Ranking
0/0