A digital phase shift circuit includes: a basic phase shift circuit including a signal line, a pair of inner lines provided on both sides of the signal line, a pair of outer lines provided outside of the inner lines, a first grounding conductor connected to one ends of the pair of inner lines and the pair of outer lines, a second grounding conductor connected to the other ends of the pair of outer lines, and a pair of electronic switches provided between the other ends of the pair of inner lines and the second grounding conductor; and an output circuit configured to decrease an output load of the basic phase shift circuit in comparison with an input load thereof.