Invention Application
- Patent Title: SEMICONDUCTOR DEVICES INCLUDING STACK STRUCTURE HAVING GATE REGION AND INSULATING REGION
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Application No.: US18906403Application Date: 2024-10-04
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Publication No.: US20250031364A1Publication Date: 2025-01-23
- Inventor: Geunwon Lim , Seokcheon Baek
- Applicant: SAMSUNG ELECTRONICS CO., LTD
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD
- Current Assignee Address: KR Suwon-si
- Priority: KR10-2019-0086900 20190718
- Main IPC: H10B41/27
- IPC: H10B41/27 ; G11C5/02 ; H01L29/788

Abstract:
A semiconductor device includes a lower structure and a stack structure that extends into a connection region on the lower structure, where the stack structure includes gate pads and mold pads. The mold pads include intermediate mold pads that include first intermediate mold pads and a second intermediate mold pad between a pair of the first intermediate mold pads, each of the first intermediate mold pads has a first length in a first direction, the second intermediate mold pad has a second length in the first direction, greater than the first length, one of the intermediate mold pads includes a mold pad portion and an insulating protrusion portion on the mold pad portion, one of the first intermediate mold pads includes the mold pad portion and the insulating protrusion portion, and a central region of the second intermediate mold pad does not include the insulating protrusion portion.
Information query