A number, M, of serial binary counters each having N bits are arranged so that individual bistable circuits of the counter define an M X N matrix. A number of shift registers, each adapted to temporarily store N+2 bits and to selectively shift a word up or down, are coupled via control circuitry to the counter matrix so that each counter is associated with a particular bit location in all of the registers for performing predetermined counting functions on that bit location. Control circuitry is provided for performing, in sequence, the steps: selectively shifting the contents of the registers, performing a predetermined logical function on the contents of the register, and then shifting the contents of the registers back to their original position. Any combinational Boolean function can be performed in parallel on the contents of the registers. Gating circuitry permits the selective transfer of the contents of any one counter in the matrix to a data bus, or the selective transfer of the contents of any one bit location of all of the counters to a data bus.