Disclosed is a computer system utilizing an interface unit for controlling coordination among central processor units and a peripheral such as a memory, in a temporal multiplex manner whereby a plurality of requests for access to the memory are clustered for response during a time period prior to grouping of other requests. The system includes at least two independently operable processors and a memory, the latter being connected to the former through the interface, and a positional or other priority resolver operable on a requestor group during the latter''s access time period.