发明授权
- 专利标题: Vertical deflection output circuitry for television receiver
- 专利标题(中): 电视接收机的垂直偏转输出电路
-
申请号: US474025申请日: 1974-05-28
-
公开(公告)号: US3979641A公开(公告)日: 1976-09-07
- 发明人: Yoshihiro Arakawa , Akio Nakashima , Shunji Iwabuchi , Kenji Ando
- 申请人: Yoshihiro Arakawa , Akio Nakashima , Shunji Iwabuchi , Kenji Ando
- 申请人地址: JA
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JA
- 优先权: JA48-59496 19730528
- 主分类号: H04N3/16
- IPC分类号: H04N3/16 ; H03K4/69 ; H01J29/70
摘要:
A vertical deflection output circuitry for a television receiver wherein two transistors are connected in single ended and push-pull relation, and the output junction point of the two transistors is connected, to a D.C. power source for supplying a higher voltage than that of a power source for the vertical deflection output circuitry, through a switch which is turned off during the vertical scan period and turned on during the vertical retrace period.
公开/授权文献
- USD280055S Sofa 公开/授权日:1985-08-13