发明授权
US4045771A Encoding and decoding device for error-detecting transmission systems,
in particular for remote-control and remote-actuation equipments
失效
用于错误检测传输系统的编码和解码设备,特别是用于远程控制和远程执行设备
- 专利标题: Encoding and decoding device for error-detecting transmission systems, in particular for remote-control and remote-actuation equipments
- 专利标题(中): 用于错误检测传输系统的编码和解码设备,特别是用于远程控制和远程执行设备
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申请号: US651254申请日: 1976-01-22
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公开(公告)号: US4045771A公开(公告)日: 1977-08-30
- 发明人: Heinz Loreck
- 申请人: Heinz Loreck
- 申请人地址: OE
- 专利权人: Leinfellner; Helmut
- 当前专利权人: Leinfellner; Helmut
- 当前专利权人地址: OE
- 优先权: OE451/75 19750122
- 主分类号: H04L1/08
- IPC分类号: H04L1/08 ; G06F11/00 ; G08C25/00
摘要:
An encoding transmitting unit converts parallel data words into timing pulse synchronized serial data words which are supplied to a transmission channel, and a decoding receiving unit receives the transmitted serial data words from the transmission channel. The encoding unit comprises a clock-pulse generator and a control circuit connected to a shift register receiving the parallel data words and having a feedback, through an inverter, from a serial word output to an additional input which is a serial word input for the inverted output signal. The shift register transmits a first pulse train representing the serial data word followed by a second pulse train representing the inverted serial data word. The decoding receiving unit includes a second shift register having a serial data word input receiving the two pulse trains from the transmission channel and having a serial data word output. An inverting exclusive OR gate has one input connected to the serial word output of this register and another input receiving the transmitted pulse trains from the transmission channel. This OR gate monitors the non-equivalence of the first and second pulse trains, to detect transmission errors and transfer the errors, as error signals, to a flip-flop acting as an error signal storage. A receiving register is connected to the shift register of the receiving unit and is operable to evaluate the transmitted data. The error signal storage, upon receipt of an error signal, prevents such evaluation of the transmitted data in the receiving register. The system may be simplified by using a pulse position modulation and may also be used for a pulse duration modulated signal. In the latter case, a synchronization bit is transmitted before each data word. An outstanding feature of the system is that it may be used with a single simple transmission channel.
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