The speed control circuit comprises a full wave rectifier having its output connected to an adjustable D.C. voltage divider. A series circuit connected to an A.C. power source includes an electric motor and an anti-parallel connection of two thyristors. The gates of the thyristors are connected to the output of the voltage divider via separate trigger circuits each providing a different trigger voltage proportional to the setting of the voltage divider. In this manner one or both thyristors may be selectively activated and the electric motor can be driven with half the waves as well as with full waves of the power source.