发明授权
US4251160A Method and arrangement for aligning a mask pattern relative to a
semiconductor substrate
失效
用于使掩模图案相对于半导体衬底对准的方法和装置
- 专利标题: Method and arrangement for aligning a mask pattern relative to a semiconductor substrate
- 专利标题(中): 用于使掩模图案相对于半导体衬底对准的方法和装置
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申请号: US924351申请日: 1978-07-13
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公开(公告)号: US4251160A公开(公告)日: 1981-02-17
- 发明人: Gijsbertus Bouwhuis , Theodorus F. Lamboo
- 申请人: Gijsbertus Bouwhuis , Theodorus F. Lamboo
- 申请人地址: NY New York
- 专利权人: U.S. Philips Corporation
- 当前专利权人: U.S. Philips Corporation
- 当前专利权人地址: NY New York
- 优先权: NLX7606548 19760617
- 主分类号: H01L21/30
- IPC分类号: H01L21/30 ; G02B27/18 ; G03F9/00 ; H01L21/027 ; G01B11/26
摘要:
A method and arrangement for aligning a mask comprising a mask-pattern relative to a substrate when the mask-pattern is repeatedly and directly imaged on the substrate, gratings in the mask and gratings on the substrate (phase gratings) being employed as alignment references. The gratings in the mask are located outside the mask pattern and the phase gratings are located on the substrate outside the area where the mask-pattern is imaged. The substrate (phase) gratings are imaged on one of the mask gratings with a projection system which is also used for projecting the mask-pattern on the substrate. The image of the gratings on the grating in the mask is adjusted. Thus, a very accurate alignment can be achieved.
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