发明授权
- 专利标题: Three-state output circuit
- 专利标题(中): 三态输出电路
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申请号: US95073申请日: 1979-11-16
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公开(公告)号: US4322640A公开(公告)日: 1982-03-30
- 发明人: Toshitaka Fukushima , Kouji Ueno
- 申请人: Toshitaka Fukushima , Kouji Ueno
- 申请人地址: JPX Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX53-145831 19781125
- 主分类号: G11C17/00
- IPC分类号: G11C17/00 ; G11C11/41 ; G11C11/416 ; G11C17/08 ; G11C17/14 ; H01L21/822 ; H01L27/04 ; H03K19/018 ; H03K19/082 ; H03K19/20
摘要:
A three-state output circuit is disclosed. The three-state output circuit is comprised of a phase-splitter transistor, a pull-up transistor and a pull-down transistor and further comprised of a control circuit which operates to make the transistors active or non-active. At least one of said transistors is connected to the control circuit via a newly employed PNP transistor through its emitter and base. The collector thereof is connected to a ground point of the three-state output circuit.
公开/授权文献
- USD413643S Pool float 公开/授权日:1999-09-07