Invention Grant
US4357596A Multi-line scan mark verification circuit 失效
多行扫描标记验证电路

Multi-line scan mark verification circuit
Abstract:
In a document scanning scheme where data is preceded on the document by a preprinted document scan mark, circuitry is employed to utilize multiple line scans of the scan mark by a line scan camera to verify the presence of a scan mark and avoid erroneous response to random marks on the document.
Public/Granted literature
Information query
Patent Agency Ranking
0/0