发明授权
- 专利标题： Method of fabricating semiconductor integrated circuit devices
- 专利标题（中）： 制造半导体集成电路器件的方法
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申请号： US457219申请日： 1983-01-11
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公开(公告)号： US4469535A公开(公告)日： 1984-09-04
- 发明人: Shigeo Kuroda , Takahiko Takahashi , Akio Anzai
- 申请人： Shigeo Kuroda , Takahiko Takahashi , Akio Anzai
- 申请人地址： JPX Tokyo
- 专利权人： Hitachi, Ltd.
- 当前专利权人： Hitachi, Ltd.
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX57/8934 19820125
- 主分类号： H01L29/73
- IPC分类号： H01L29/73 ; H01L21/331 ; H01L21/76 ; H01L21/762 ; H01L21/8222 ; H01L29/72 ; H01L21/22
摘要：
A method of fabricating semiconductor integrated circuit devices having a semiconductor region in a position separated by a predetermined distance from a dielectric isolating region provided on the surface of a semiconductor wafer, comprising the steps of forming a first mask to define the dielectric isolating region and semiconductor region, forming a second mask over the first mask so as to cover the region which is to become the semiconductor region, and removing the second mask after the dielectric isolating region has been formed by the first and second masks, to form the semiconductor region. The method thus permits the semiconductor region to be self-aligned with the dielectric isolating region.
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