发明授权
US4500994A Multi-rate branch metric processor for maximum-likelihood convolutional
decoder
失效
用于最大似然卷积解码器的多速率分支度量处理器
- 专利标题： Multi-rate branch metric processor for maximum-likelihood convolutional decoder
- 专利标题（中）： 用于最大似然卷积解码器的多速率分支度量处理器
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申请号： US432489申请日： 1982-10-04
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公开(公告)号： US4500994A公开(公告)日： 1985-02-19
- 发明人: Ronald D. McCallister , James J. Crawford
- 申请人： Ronald D. McCallister , James J. Crawford
- 申请人地址： IL Schaumberg
- 专利权人： Motorola, Inc.
- 当前专利权人： Motorola, Inc.
- 当前专利权人地址： IL Schaumberg
- 主分类号： H03M13/41
- IPC分类号： H03M13/41 ; G06F11/12
摘要：
A branch metric processor for use in a maximum-likelihood convolutional decoder accepts a set of soft-decision symbols, an indicator of a level of quantization thereof and a set of erase control signals and generates branch metrics for base code rates of 1/3 and 1/2. The apparatus represents a substantial reduction in complexity over prior art devices. Erasure of selected symbols allows the processor to generate branch metrics for higher code rates and is advantageous in very low code rate applications.
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