An integrated circuit device containing internal logic and/or memory circuitry is provided with means to receive multiple inputs at the voltage levels of different logic families and with means to provide multiple outputs at the voltage levels of different logic families. On-chip input translators receive the inputs at the level of a given logic family and translate to the level required by the internal logic and/or memory circuitry. After performance of logic and/or memory functions, on-chip output translators translate the output of the internal logic and/or memory circuitry and provide external outputs at the voltage levels of different logic families. The internal logic and/or memory circuitry may be of a single logic family or may be composed of several logic families. On-chip translators may also be added between internal logic and/or memory circuitry of different families.