发明授权
US4584491A TTL to CMOS input buffer circuit for minimizing power consumption
失效
TTL到CMOS输入缓冲电路，以最大限度地降低功耗
- 专利标题： TTL to CMOS input buffer circuit for minimizing power consumption
- 专利标题（中）： TTL到CMOS输入缓冲电路，以最大限度地降低功耗
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申请号： US570114申请日： 1984-01-12
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公开(公告)号： US4584491A公开(公告)日： 1986-04-22
- 发明人: Richard W. Ulmer
- 申请人： Richard W. Ulmer
- 申请人地址： IL Schaumburg
- 专利权人： Motorola, Inc.
- 当前专利权人： Motorola, Inc.
- 当前专利权人地址： IL Schaumburg
- 主分类号： H03K19/00
- IPC分类号： H03K19/00 ; H03K19/0948 ; H03K19/094
摘要：
A buffer circuit comprising a current source transistor, a switching transistor and a current sink transistor coupled in series is provided. Control electrodes of the switching transistor and current sink transistor are directly connected and coupled to an input voltage. The buffer circuit has an accurate switchpoint voltage which is substantially process and temperature independent, and the circuit does not consume power for input voltages having low and high CMOS levels.