发明授权
US4623256A Apparatus for inspecting mask used for manufacturing integrated circuits
失效
用于检查用于制造集成电路的掩模的装置
- 专利标题： Apparatus for inspecting mask used for manufacturing integrated circuits
- 专利标题（中）： 用于检查用于制造集成电路的掩模的装置
-
申请号： US674652申请日： 1984-11-26
-
公开(公告)号： US4623256A公开(公告)日： 1986-11-18
- 发明人: Osamu Ikenaga , Ryoichi Yoshikawa
- 申请人： Osamu Ikenaga , Ryoichi Yoshikawa
- 申请人地址： JPX Kawasaki
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JPX Kawasaki
- 优先权： JPX58-220980 19831124
- 主分类号： H01L21/66
- IPC分类号： H01L21/66 ; G01B11/24 ; G01N21/94 ; G01N21/956 ; G03F1/84 ; H01L21/027 ; H01L21/30 ; G01B11/00
摘要：
A mask inspection apparatus is arranged to compare a measured data signal obtained by optically measuring a photomask with a design data signal representing an integrated circuit pattern so as to inspect defects of the photomask on which the integrated circuit pattern is drawn. To inspect the pattern area and its peripheral area of the mask in one step, a reference signal generator in the mask inspection apparatus is arranged to generate a reference signal containing a predetermined additional data signal representing the peripheral area of the integrated circuit pattern, in addition to the design data signal representing the integrated circuit pattern. The reference signal is compared with the measured data signal of the pattern area and its peripheral area.
公开/授权文献
信息查询
IPC分类:
