An amplifier that supplies a bias current (I.sub.t) which is dependent on an input signal (V.sub.i) to a junction point (2) of the source electrodes of first and second transistors (T.sub.1, T.sub.2). The amplifier comprises a control circuit that limits the bias current so it cannot increase more than is necessary to obtain a high slew rate, thereby minimizing dissipation by the amplifier. This control circuit comprises a third and a fourth transistor (T.sub.3, T.sub.4) arranged in parallel with the first transistor (T.sub.1) and the second transistor (T.sub.2), respectively, and which carry currents (I.sub.3, I.sub.4) which are proportional to the currents (I.sub.1, I.sub.2) in the first and the second transistor. A selection circuit (5) applies the smaller of the two currents (I.sub.3, I.sub.4) in the third and the fourth transistor to an output (8) where this current is compared with a reference current (I.sub.o) from a current source (9). The difference between these currents is applied to a current amplifier ( 10), which supplies an increasing bias current (I.sub.t) until the smaller of the two currents (I.sub.3, I.sub.4) in the third and the fourth transistor equals the reference current.