发明授权
US4677736A Self-aligned inlay transistor with or without source and drain self-aligned metallization extensions 失效
具有或不具有源极和漏极自对准金属化扩展的自对准镶嵌晶体管

Self-aligned inlay transistor with or without source and drain
self-aligned metallization extensions
摘要:
A self-aligned process is described for depositing gate electrode material in an inlay field effect transistor. The process particularly provides means for inclusion of lightly doped source and drain extensions to minimize high field effects in the channel region. The process described herein is also particularly useful for providing source and drain contact metal which also acts as an ion implantation mask layer during several of the process steps. The method described herein is usable in conventional VLSI fabrication production facilities.
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