发明授权
- 专利标题: Semiconductor frame buffer memory
- 专利标题(中): 半导体帧缓冲存储器
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申请号: US923044申请日: 1986-10-24
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公开(公告)号: US4833657A公开(公告)日: 1989-05-23
- 发明人: Shigeru Tanaka
- 申请人: Shigeru Tanaka
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX60-243354 19851030
- 主分类号: G09G5/36
- IPC分类号: G09G5/36 ; G06F12/04 ; G06F12/06 ; G06T1/60 ; G06T3/00 ; G09G5/39 ; G09G5/395
摘要:
A semiconductor memory for writing or reading data words in response to prescribed bank address data and bit address data, each word having a prescribed amount of bits, is described. The memory includes a memory array for storing the data words. The memory array includes at least two memory banks adjacent to one another, each bank having a bit area corresponding to the prescribed amount of bits, buffer memory for temporarily storing the data word for writing into the memory array or the data word read from the memory array, a first source for applying the bank address data to the memory array to access the memory banks, a second source for applying the bit address data to the memory banks to access prescribed bit locations of the memory banks, and logic circuitry responsive to the bit address data for cyclically shifting the data word stored in the buffer memory by an amount corresponding to the value of the received bit address data.
公开/授权文献
- US5873414A Bypass valve for downhole motor 公开/授权日:1999-02-23
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