发明授权
US4839865A Selective application of voltages for testing storage cells in
semiconductor memory arrangements
失效
选择性地应用电压以测试半导体存储器布置中的存储单元
- 专利标题: Selective application of voltages for testing storage cells in semiconductor memory arrangements
- 专利标题(中): 选择性地应用电压以测试半导体存储器布置中的存储单元
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申请号: US934666申请日: 1986-11-24
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公开(公告)号: US4839865A公开(公告)日: 1989-06-13
- 发明人: Katsuyuki Sato , Hiroshi Kawamoto , Kazumasa Yanagisawa
- 申请人: Katsuyuki Sato , Hiroshi Kawamoto , Kazumasa Yanagisawa
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX60-261154 19851122
- 主分类号: G11C11/401
- IPC分类号: G11C11/401 ; G11C11/404 ; G11C11/4074 ; G11C29/00 ; G11C29/50
摘要:
A dynamic RAM is provided with a plurality of 1-MOSFET memory cells, each having a storage capacitor and a switching MOSFET coupled to one electrode of the storage capacitor. The other electrode of each of the storage capacitors is coupled to a switching circuit which controls the voltage which is applied to the capacitor. The switching circuit is, in turn, coupled to both a voltage generating circuit (which preferably provides a voltage of 1/2 Vcc) and a voltage supply circuit which is set to provide predetermined test voltages. Thus, by operating the switching circuit, a voltage of 1/2 Vcc can be applied to the memory cell capacitors during normal operation of the dynamic RAM, and the predetermined test voltages can be applied to the memory cell capacitors during a testing operation.
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