发明授权
- 专利标题: Tri-state IIL gate
- 专利标题(中): 三态IIL门
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申请号: US832694申请日: 1986-02-25
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公开(公告)号: US4841484A公开(公告)日: 1989-06-20
- 发明人: Kazuo Watanabe , Makoto Furihata , Kouichi Yamazaki
- 申请人: Kazuo Watanabe , Makoto Furihata , Kouichi Yamazaki
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX60-34341 19850225; JPX60-34342 19850225; JPX60-86373 19850424; JPX60-86398 19850424
- 主分类号: H01L27/02
- IPC分类号: H01L27/02 ; H03K19/082
摘要:
A semiconductor integrated circuit device comprising a logic circuit which is constituted by using tri-state IIL gates. The tri-state IIL gates are particularly arranged to have first and second inputs. If the second input has a first level, the circuit will operate as a normal IIL circuit to provide high and low outputs in response to the first input. However, if the second input has a second level, the circuit will provide a floating output regardless of the first input. The transistors of the IIL circuit can be formed in an island in the substrate, with the potential of the island serving as the second input. In a preferred arrangement, the first level of the second input can be obtained by grounding the island while the second level is obtained by disconnecting the island from ground. These tri-state IIL gates are particularly advantageous to form a transfer gate for an IIL memory similar to the transfer gates used for MOS memories. They can also be used for forming various other logic gate arrangements.
公开/授权文献
- US5809795A Fuzzy logic liquid level control 公开/授权日:1998-09-22