发明授权
- 专利标题: Asymmetrical clock chopper delay circuit
- 专利标题(中): 不对称时钟斩波延迟电路
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申请号: US151381申请日: 1988-02-02
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公开(公告)号: US4851711A公开(公告)日: 1989-07-25
- 发明人: Yuen H. Chan , Rolf H. Nijhuis , Carlos G. Rivadeneira , James R. Struk
- 申请人: Yuen H. Chan , Rolf H. Nijhuis , Carlos G. Rivadeneira , James R. Struk
- 申请人地址: NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: NY Armonk
- 主分类号: G06F1/04
- IPC分类号: G06F1/04 ; G06F1/08 ; G06F1/10 ; H03K3/288 ; H03K5/04 ; H03K5/13
摘要:
An asymmetrical delay generator for use in a clock chopping circuit is disclosed. The circuit has a complementary transistor switch memory cell in it. That cell is operated in a mode where one half of the cell operates in saturation mode. That half of the cell controls the pulse width of the chopper. The other half of the cell is not operated in saturation and controls the resetting of the chopper and hence the maximum clock rate at which the circuit will operate.
公开/授权文献
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