发明授权
- 专利标题: Memory using distributed data line loading
- 专利标题(中): 内存使用分布式数据线加载
-
申请号: US342160申请日: 1989-04-21
-
公开(公告)号: US4928268A公开(公告)日: 1990-05-22
- 发明人: Scott G. Nogle , Perry H. Pelley, III , Stephen T. Flannagan , Bruce E. Engles
- 申请人: Scott G. Nogle , Perry H. Pelley, III , Stephen T. Flannagan , Bruce E. Engles
- 申请人地址: IL Schaumburg
- 专利权人: Motorola, Inc.
- 当前专利权人: Motorola, Inc.
- 当前专利权人地址: IL Schaumburg
- 主分类号: G11C11/41
- IPC分类号: G11C11/41 ; G11C7/10 ; G11C11/401 ; G11C11/409 ; G11C11/417
摘要:
A memory which contains a global data line pair and a plurality of loads for the global data line pair distributed thereon. The global data lines run the length of the memory, and are connected to a set of arrays distributed along the global data lines, of which each array provides a voltage on the global data lines when selected. The first load is located above the first array and the last is located below the last array. Other global data line loads are placed between consecutive arrays. In a read mode of operation a pair of loads associated with each array is enabled when a corresponding array is selected. Placement of the loads in this manner decreases an access time considerably.
公开/授权文献
- US5609052A Loader and method for loading lock pins 公开/授权日:1997-03-11
信息查询