An apparatus for adding a first input value and a second input value smaller than the first input value comprises a memory device for memorizing an under flow component; a first adder for adding an output value from the memory device and the first input value; a second adder for adding an output value of the first adder and the second input value; a first subtracter for subtracting the second input value from an output value of the second adder; and a comparator for comparing the output value of the first adder and an output value of the first subtracter. It is judged by an output value of the comparator whether or not the output value of the first adder is memorized in the memory device.