发明授权
- 专利标题: Distortion eliminating circuit
- 专利标题(中): 失真消除电路
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申请号: US259152申请日: 1988-10-18
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公开(公告)号: US4958234A公开(公告)日: 1990-09-18
- 发明人: Hirohisa Yamaguchi , Akira Mashimo
- 申请人: Hirohisa Yamaguchi , Akira Mashimo
- 申请人地址: JPX
- 专利权人: Teac Corporation
- 当前专利权人: Teac Corporation
- 当前专利权人地址: JPX
- 优先权: JPX62-265555 19871021
- 主分类号: G11B20/10
- IPC分类号: G11B20/10 ; G11B7/00 ; G11B7/004 ; G11B7/005 ; G11B20/06 ; H04N9/79
摘要:
A distortion eliminating circuit for eliminating a harmonic distortion from an input frequency modulated luminance signal comprises a comparator for producing a series of output pulses responsive to the input frequency modulated luminance signal by comparing the level of the frequency modulated luminance signal with a predetermined level, a filtering circuit for extracting a d.c. component from the series of output pulses by filtering out oscillating components from said output pulses, a detecting circuit for extracting a d.c. distortion component corresponding to the harmonic distortion in the input frequency modulated luminance signal by comparing the level of the d.c. component by a reference level, and a level adjusting circuit for adjusting the level of the input frequency modulated luminance signal by adding or subtracting the d.c. distortion component to the input frequency modulated luminance signal and for supplying the input frequency modulated luminance signal having a level now thus adjusted to the comparator.
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